Subject Matter Expert – Cleanliness (m/f/d) for the semiconductor industry

Who We Are

Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.

What We Offer

Location:

Heimstetten,DEU

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more.

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About the Role

We are establishing a dedicated Subject Matter Expert (SME) for Cleanliness within R&D to ensure that cleanliness requirements are defined, designed for, and verified at component and system levels. In this role, you will work closely with the experts responsible for the operational side of cleanliness, who focus on and ensure that the specifications defined during development are not only met but also consistently maintained throughout serial production.

A key benefit of this new role is the ability to drive foundational cleanliness research and benchmarking and to support multiple development projects with cross‑cutting expertise. This includes activities such as evaluating advanced materials and coatings, identifying low‑outgassing or low‑particle‑generating materials, and validating new surface treatments that enhance cleanability. Your work will generate insights, standards, and best practices that benefit every current and future product platform.

As the SME for Cleanliness, you will define cleanliness specifications, guide design choices, assess manufacturability and cleaning compatibility, and develop verification methodologies to confirm clean-state compliance.

Key Responsibilities

Foundational Cleanliness Research & Benchmarking

• Identify and validate materials, coatings, and surface structuring techniques that improve part cleanability, reduce outgassing, or minimize particle generation.
• Perform lab testing, comparative studies, and structured evaluations to build a knowledge base of superior cleanliness solutions for future product designs.
• Translate research into R&D standards, design rules, and qualification criteria.

Design for Cleanliness Leadership

• Define cleanliness requirements for components, assemblies, and system-level modules (e.g., particle limits, residual gas limits, surface cleanliness grades).
• Establish design guidelines that ensure parts are inherently cleanable and maintainable throughout the lifecycle.

Geometry & Accessibility Requirements

• Advice on dimensions, radii, line-of-sight constraints, surface finishes, and accessibility considerations that affect cleanability.
• Review designs for risk of particle traps, outgassing sources, contamination accumulation, or cleaning limitations.

Material & Manufacturing Expertise

• Specify suitable materials and manufacturing processes based on cleanability and resistance to cleaning agents, bakeout cycles, plasma treatments, and other decontamination methods.
• Support operational functions in assessing suppliers and part designs for compliance with cleanliness-relevant constraints by defining requirements and providing troubleshooting assistance.

Verification of Cleanliness

• Support the definition and establishment of methods to verify that cleanliness specifications are met, including analytical, measurement, or inspection methods.
• Support creation of test procedures for clean-state verification during NPI and engineering builds.

Cross-Functional Collaboration

• Act as the R&D counterpart to Cleanliness & Contamination Control in Operations, ensuring seamless continuity between design requirements and operational implementation.
• Work closely with product designers, process engineers, quality engineers, and suppliers to ensure cleanliness risks are identified and mitigated early.

Knowledge & Process Development

• Build and maintain R&D standards, documentation, and best practices for Design for Cleanliness.
• Capture lessons learned, known failure mechanisms, contamination risks, and material compatibility issues.

Required Qualifications & Experience

Education

• Bachelor’s or Master’s degree in Chemistry, Chemical Engineering, Materials Science, Physics, Mechanical Engineering or related technical field.

Professional Experience

• Experience in high-tech, semiconductor, vacuum, or precision instrumentation industries.
• Hands-on understanding of contamination mechanisms, particulate control, outgassing behavior, or clean manufacturing environments.
• Background with material compatibility, surface treatments, or precision manufacturing methods.

Domain Expertise (Preferred)

• Knowledge of vacuum technology, UHV materials, residual gas analysis (RGA), or electron‑optical systems.
• Experience with particle measurement methods, cleanliness standards, or contamination control strategies.
• Understanding of cleanroom best practices and controlled manufacturing processes.

Preferred Qualifications

• Advanced degree (Master’s or Ph.D.) in a relevant engineering or physical science discipline.
• Experience with bakeout processes, plasma cleaning, solvent compatibility, or surface preparation.
• Familiarity with industry cleanliness standards (e.g., ISO cleanroom classifications, UHV cleanliness requirements).
• Exposure to supplier qualification, material certification, or component-level cleanliness testing.

Preferred Skills

Material, Surface & Coating Expertise

• Knowledge of surface chemistry or surface sciences, especially related to cleanability, outgassing, and contamination behavior.
• Understanding of surface treatments, plasma processes, polishing methods, or micro‑structuring techniques that influence cleanability, outgassing behavior, or particle shedding.
• Experience with elastomers, sealing technologies, o‑ring materials, and associated semiconductor‑grade coating technologies.
• Ability to design and execute lab-level comparative testing for materials and coatings.

Technical & Analytical Skills

• Strong analytical mindset to translate contamination risks into engineering requirements.
• Ability to evaluate material/process compatibility for demanding cleaning or decontamination treatments.
• Familiarity with metrology and analysis tools used to verify cleanliness and contamination levels.

Design & Review Skills

• Ability to review drawings, 3D models, and assemblies for cleanliness-critical geometries.
• Strong understanding of design-for-manufacturing considerations related to contamination control.

Collaboration & Communication

• Ability to work with mechanical, electrical, and process engineers to guide design decisions.
• Clear communication of cleanliness requirements across R&D and Operations teams.

Continuous Improvement

• Commitment to developing new standards, methods, and guidelines for Design for Cleanliness.
• Proactive identification of contamination risks and implementation of preventive design measures.

Additional Information

Time Type:

Full time

Employee Type:

Assignee / Regular

Travel:

Yes, 10% of the Time

Relocation Eligible:

No