: Graduate Engineer – Digital Backend (RTL to GDS), Cadence Flow (f / m / d)

Job Description

As a Graduate Digital Backend Engineer , you will participate in the end‑to‑end physical implementation of complex SoC and mix-signal designs. You will work within an experienced backend team and learn how to transform RTL code into a tape‑out‑quality GDSII database using the Cadence digital implementation tool suite. The role spans the complete backend flow including synthesis, floorplanning, power planning, place & route, timing closure, physical verification, and sign‑off.

You will receive structured coaching, access to internal training material, and the opportunity to work on real production designs while gradually taking ownership of specific blocks.

1. RTL Synthesis (Cadence Genus)

• Run logic synthesis and generate optimized netlists according to timing, area, and power constraints.
• Perform constraint development and validation (SDC).
• Analyze synthesis reports : timing, area, power, QoR, and identify optimization opportunities.
• Collaborate with RTL and verification teams to resolve structural issues.

2. Floorplanning & Power Planning (Cadence Innovus)

3. Placement, Clock Tree Synthesis & Routing

4. Static Timing Analysis (Cadence Tempus)

5. Power & IR‑Drop Analysis (Cadence Voltus)

6. Physical Verification (Mentor Calibre)

7. Sign‑off, ECO Handling & Final GDSII Output

Qualifications

Nice‑to‑Have Skills

What We Offer