Senior/Staff ASIC Design Engineer
Senior / Staff ASIC Design Engineer Opportunity - Munich - Global Semis Company!
A rapidly growing global semiconductor industry player specialising in digital & mixed-signal battery and power management solutions is seeking an experienced Senior / Staff ASIC Design Engineer to join their team!
The key skills needed for the Senior / Staff ASIC Design Engineer are :
- Experience in RTL Design for complex ASIC projects.
- Experience working on full-flow projects.
- Exposure to multiple elements of the ASIC design cycle, including : specification definition, RTL coding, synthesis, ATPG generation or verification.
- Proficient in at least one hardware description language (EG : Verilog or SystemVerilog).
- Involvement in at least one successful tape-out.
If you are interested in finding out more, or applying for this role, please contact Lucy Edmondson
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